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csst-sims
csst_msc_sim
Commits
7dd488e0
Commit
7dd488e0
authored
Apr 12, 2024
by
Fang Yuedong
Browse files
change project_cycle to 9
parent
47c7a760
Changes
2
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config/config_overall.yaml
View file @
7dd488e0
...
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@@ -14,7 +14,7 @@ work_dir: "/public/home/fangyuedong/project/workplace/"
run_name
:
"
QSO_50sqdeg_test"
# Project cycle and run counter are used to name the outputs
project_cycle
:
6
project_cycle
:
9
run_counter
:
1
# Run options
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...
config/obs_config_SCI_WIDE_phot.yaml
View file @
7dd488e0
...
...
@@ -63,7 +63,7 @@ call_sequence:
nonlinearity
:
{}
# Apply CCD Saturation & Blooming
blooming
:
{}
#
#
Run CTE simulation
# Run CTE simulation
CTE_effect
:
{}
# Add prescan and overscan
prescan_overscan
:
{}
...
...
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