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csst-sims
csst_mci_sim
Commits
4edebcbd
Commit
4edebcbd
authored
Jul 26, 2024
by
Yan Zhaojun
Browse files
debug
parent
06599961
Pipeline
#6428
failed with stage
in 0 seconds
Changes
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1
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csst_mci_sim/csst_mci_sim.py
View file @
4edebcbd
...
@@ -1596,7 +1596,7 @@ class MCIsimulator():
...
@@ -1596,7 +1596,7 @@ class MCIsimulator():
if
j
==
0
:
if
j
==
0
:
self
.
log
.
info
(
'begin iteration........'
)
self
.
log
.
info
(
'begin iteration........'
)
###############33
#if self.debug:
#if self.debug:
#self.log.info('j = %i' % (j))
#self.log.info('j = %i' % (j))
...
...
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