Commit f4148616 authored by Yan Zhaojun's avatar Yan Zhaojun
Browse files

debug

parent 95b45372
Pipeline #4081 passed with stage
...@@ -5071,12 +5071,13 @@ class MCIsimulator(): ...@@ -5071,12 +5071,13 @@ class MCIsimulator():
############################################################################################## ##############################################################################################
sourcelist=['EXDF','STAR','PIPR','TRNS','COMB','CALI'] sourcelist=['EXDF','STAR','PIPR','TRNS','COMB','CALI']
cli_list=['FLAT','BIAS','DARK'] sim_list=['FLAT','BIAS','DARK','EXDF','STAR','PIPR','TRNS','COMB','CALI']
if self.source not in sourcelist or not in cli_list:
if self.source not in sim_list:
print('Sourcein is wrong') print('Sourcein is wrong')
sys.exit(1) sys.exit(1)
self.information['ver']='01'
self._loadGhostModel() self._loadGhostModel()
self.load_filter_PSF() self.load_filter_PSF()
self.information['simnumber']=simnumber self.information['simnumber']=simnumber
......
...@@ -4,6 +4,7 @@ dir_path=mci_sim/MCI_inputData/ ...@@ -4,6 +4,7 @@ dir_path=mci_sim/MCI_inputData/
result_path=mci_sim/mci_sim_result/ result_path=mci_sim/mci_sim_result/
ver=C91
#size of the output image array, xsize is column, ysize is row, xsize = 9216,ysize = 9232 #size of the output image array, xsize is column, ysize is row, xsize = 9216,ysize = 9232
xsize =9216 xsize =9216
......
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