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csst-sims
csst_msc_sim
Commits
a4b37258
Commit
a4b37258
authored
Oct 16, 2025
by
JX
😵
Browse files
Merge remote-tracking branch 'origin/develop'
parents
476e9949
ec9b0275
Pipeline
#10713
passed with stage
in 0 seconds
Changes
2
Pipelines
1
Hide whitespace changes
Inline
Side-by-side
observation_sim/config/ChipOutput.py
View file @
a4b37258
...
...
@@ -73,7 +73,7 @@ class ChipOutput(object):
self
.
hdr
+=
additional_column_names
def
create_output_file
(
self
):
if
self
.
pointing_type
==
'WIDE'
or
self
.
pointing_type
==
'DEEP'
:
if
self
.
pointing_type
==
'WIDE'
or
self
.
pointing_type
==
'DEEP'
or
self
.
pointing_type
==
'CALF'
or
self
.
pointing_type
==
'CALSP'
or
self
.
pointing_type
==
'CALSS'
:
self
.
cat
=
open
(
os
.
path
.
join
(
self
.
subdir
,
self
.
cat_name
),
"w"
)
self
.
logger
.
info
(
"Creating catalog file %s ...
\n
"
%
(
os
.
path
.
join
(
self
.
subdir
,
self
.
cat_name
)))
...
...
observation_sim/config/header/ImageHeader.py
View file @
a4b37258
...
...
@@ -556,6 +556,10 @@ def generateExtensionHeader(chip, xlen=9216, ylen=9232, ra=60, dec=-40, pa=-23.4
h_ext
[
'GAIN14'
]
=
chip
.
gain_channel
[
13
]
h_ext
[
'GAIN15'
]
=
chip
.
gain_channel
[
14
]
h_ext
[
'GAIN16'
]
=
chip
.
gain_channel
[
15
]
h_ext
[
'PSCAN1'
]
=
chip
.
prescan_x
h_ext
[
'PSCAN2'
]
=
chip
.
prescan_y
h_ext
[
'OSCAN1'
]
=
chip
.
overscan_x
h_ext
[
'OSCAN2'
]
=
chip
.
overscan_y
h_ext
[
'RON01'
]
=
readout
h_ext
[
'RON02'
]
=
readout
h_ext
[
'RON03'
]
=
readout
...
...
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